module led_display(
	input clk_51200Hz,
	input rst_n,
	input[15:0] led_state,
	output reg[7:0] led_out
);
	
	parameter STATE1 = 7'd0;
	parameter STATE2 = 7'd35;
	parameter STATE3 = 7'd70;
	
	reg[6:0] count;
	
	always @(posedge clk_51200Hz or negedge rst_n) begin
		if(rst_n == 1'b0) begin
			led_out = 8'd0;
			count = 7'd0;
		end
		else begin
			if(count <= STATE2) begin
				led_out = led_state[15:8] | led_state[7:0];
			end
			else if(count <= STATE3) begin
				led_out = led_state[15:8];
			end
			else begin
				led_out = 8'b0000_0000;
			end
			
			if(count >= 7'd127) begin
				count = 7'd0;
			end
			else begin
				count = count + 7'd1;
			end
		end
	end

endmodule
